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[rlc-10/6.12.0-211.18.1.el10_2] Multiple patches tested (3 commits)#1308

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[rlc-10/6.12.0-211.18.1.el10_2] Multiple patches tested (3 commits)#1308
PlaidCat merged 3 commits into
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{jmaple}_rlc-10/6.12.0-211.18.1.el10_2

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Summary

This PR has been automatically created after successful completion of all CI stages.

Commit Message(s)

KVM: arm64: vgic-its: Drop the translation cache reference only for the erased entry

cve CVE-2026-46316
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit 13031fb6b8357fbbcded2a7f4cba73e4781ee594
KVM: arm64: Reassign nested_mmus array behind mmu_lock

cve CVE-2026-46317
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit 70543358fa08e0f7cebc3447c3b70fe97ad7aaa8
KVM: arm64: Take the SRCU lock for page table walks in fault injection and AT emulation

bugfix aarch64 kvm
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit f2ca45b50d4216c9cc7ffabf50d9ad1932209251

Test Results

✅ Build Stage

Architecture Build Time Total Time
x86_64 39m 31s 40m 20s
aarch64 24m 34s 25m 12s

✅ Boot Verification

✅ Kernel Selftests

Architecture Passed Failed Compared Against Status
x86_64 426 66 rlc-10/6.12.0-211.18.1.el10_2 ⚠️ No baseline available
aarch64 715 107 rlc-10/6.12.0-211.18.1.el10_2 ⚠️ No baseline available

✅ LTP Results

Architecture Passed Failed Compared Against Status
x86_64 1481 79 rlc-10/6.12.0-211.18.1.el10_2 ⚠️ No baseline available
aarch64 1454 80 rlc-10/6.12.0-211.18.1.el10_2 ⚠️ No baseline available

🤖 This PR was automatically generated by GitHub Actions
Run ID: 27222932094

PlaidCat added 3 commits June 9, 2026 13:02
…he erased entry

cve CVE-2026-46316
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit 13031fb

vgic_its_invalidate_cache() walks the per-ITS translation cache with
xa_for_each() and drops the cache's reference on each entry with
vgic_put_irq(). It puts the iterated pointer, though, rather than the
value returned by xa_erase().

The function is called from contexts that do not exclude one another: the
ITS command handlers hold its_lock, the GITS_CTLR write path holds
cmd_lock, and the path that clears EnableLPIs in a redistributor's
GICR_CTLR holds neither. Two or more of them can drain the same cache
concurrently, and if each one observes the same entry, erases it and then
puts it, the single reference the cache holds on that entry is dropped
more than once. The entry can then be freed while an ITE still maps it.

xa_erase() is atomic and returns the previous entry, so put only the entry
that this context actually removed. The cache reference is then dropped
exactly once per entry even when the invalidations run concurrently, and
the behavior is unchanged when only one context runs.

Fixes: 8201d10 ("KVM: arm64: vgic-its: Maintain a translation cache per ITS")
	Signed-off-by: Hyunwoo Kim <imv4bel@gmail.com>
	Reviewed-by: Oliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/ah2c5lu4JbUg7dj-@v4bel
	Signed-off-by: Marc Zyngier <maz@kernel.org>
	Cc: stable@vger.kernel.org
(cherry picked from commit 13031fb)
	Signed-off-by: Jonathan Maple <jmaple@ciq.com>
cve CVE-2026-46317
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit 7054335

kvm->arch.nested_mmus[] is walked under kvm->mmu_lock, including from the
MMU notifier path (kvm_unmap_gfn_range() -> kvm_nested_s2_unmap()), which
can run at any time. kvm_vcpu_init_nested() reallocates the array and frees
the old buffer while holding only kvm->arch.config_lock, so such a walker
can reference the freed array.

Allocate the new array outside of mmu_lock, as the allocation can sleep.
Under the lock, copy the existing entries, fix up the back pointers and
reassign the array. Free the old buffer after dropping the lock, as
kvfree() can sleep as well.

Fixes: 4f128f8 ("KVM: arm64: nv: Support multiple nested Stage-2 mmu structures")
	Signed-off-by: Hyunwoo Kim <imv4bel@gmail.com>
	Reviewed-by: Oliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/aiKIVVeIr1aAB1yp@v4bel
	Signed-off-by: Marc Zyngier <maz@kernel.org>
	Cc: stable@vger,kernel.org
(cherry picked from commit 7054335)
	Signed-off-by: Jonathan Maple <jmaple@ciq.com>
…n and AT emulation

bugfix aarch64 kvm
commit-author Hyunwoo Kim <imv4bel@gmail.com>
commit f2ca45b

walk_s1() and kvm_walk_nested_s2() expect to be called while holding
kvm->srcu to guard against memslot changes. While this is generally
the case, __kvm_at_s12() and __kvm_find_s1_desc_level() call into the
respective walkers without taking kvm->srcu.

Fix by acquiring kvm->srcu prior to the table walk in both instances.

	Cc: stable@vger.kernel.org
Fixes: 50f77dc ("KVM: arm64: Populate level on S1PTW SEA injection")
Fixes: be04ceb ("KVM: arm64: nv: Add emulation of AT S12E{0,1}{R,W}")
	Suggested-by: Oliver Upton <oupton@kernel.org>
	Signed-off-by: Hyunwoo Kim <imv4bel@gmail.com>
	Reviewed-by: Oliver Upton <oupton@kernel.org>
Link: https://patch.msgid.link/aiAZfdeyanIvP8SD@v4bel
	Signed-off-by: Marc Zyngier <maz@kernel.org>
(cherry picked from commit f2ca45b)
	Signed-off-by: Jonathan Maple <jmaple@ciq.com>
@ciq-kernel-automation ciq-kernel-automation Bot added the created-by-kernelci Tag PRs that were automatically created when a user branch was pushed to the repo (kernelCI) label Jun 9, 2026
@bmastbergen

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Maybe we dont need f2ca45b in this kernel?
https://lore.kernel.org/all/aif5nV0qvDy6-a9u@v4bel/

@bmastbergen

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Maybe we dont need f2ca45b in this kernel? https://lore.kernel.org/all/aif5nV0qvDy6-a9u@v4bel/

We do need it. This kernel has KVM arm64 NV backported to it from 6.18. Nevermind.

@bmastbergen bmastbergen self-requested a review June 9, 2026 23:37

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🥌

@PlaidCat PlaidCat merged commit 0e2488f into rlc-10/6.12.0-211.18.1.el10_2 Jun 10, 2026
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@PlaidCat PlaidCat deleted the {jmaple}_rlc-10/6.12.0-211.18.1.el10_2 branch June 10, 2026 13:40
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3 participants